High-Tech Insulation for Microchip Wiring

Your rating: None Average: 5 (2 votes)
2,935 Views

When it comes to microchip technology, transistors seem to get all the attention. But did you know that the transistor layer only makes up 10% of a modern logic chip?

The other 90% is made up of interconnect layers – the three-dimensional maze of copper wires that make connections between all those transistors and the outside world. From a volume perspective, that makes the dielectric insulator that supports all that copper the most important material in all of chipmaking!

With each technology node, the interconnects are squeezed closer together, increasing the potential for parasitic capacitance that slows the chip down and wastes power. To compensate, the dielectric has evolved from a simple glass-like material to a complex structure of nanoscale air pockets trapped in a carbon-silicon matrix.

In this video, Russ Perry explores the breakthroughs in dielectric technology that have enabled interconnect performance to keep pace with Moore’s Law while steadily increasing power-efficiency, the two keys to the success of mobile computing.


Bookmark/search this post with:

Comments

Post new comment

The content of this field is kept private and will not be shown publicly.
Be sure to start the URL with "http://" or "https://" as appropriate.
CAPTCHA
This question is for testing whether you are a human visitor and to prevent automated spam submissions.
Image CAPTCHA
Copy the characters (respecting upper/lower case) from the image.