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3D Chip Stacking

3D Chip Technology for Dummies

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It's not just movies, televisions and video games that are going three-dimensional these days. Microchips are doing it, too.

Semiconductors aren't shifting into the third dimension because it’s fashionable, though. This shift is about continuing Moore’s Law, the relentless drive for higher performance that has driven the industry for four decades.

With three very different types of 3D construction in development today, it can be a confusing subject. Vertical chip structures, 3D device stacking, 3D chip packaging – what does it all mean?

We made this video to help demystify the subject. Did it help? Let me know in the comments below.

 

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Enabling Future Memory Devices

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As memory scaling proceeds, the industry is evaluating a variety of options for achieving the performance required from sub-2X memory devices.

DRAM, Flash, and emerging memory development each face unique complexities and unknowns. What will DRAM technology look like in three to five years? What is the next big growth area for the NAND market? What’s next in emerging memory? Is a universal memory format the next technology?

In conjunction with the International Memory Workshop 2011 on May 23 in Monterey, California, Applied Materials will host a panel discussion with distinguished speakers from Hynix, IMEC, Nokia, Samsung, and Toshiba for a thought-provoking and lively conference session discussing these questions and related topics.Read more

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Applied Materials Leads the Way to Enable TSV Interconnects for 3D Chip Stacking

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At this year's SEMICON West 2010, Applied Materials introduced the Producer Avila system, the latest innovation for TSV production. Sesh Ramaswami, Senior Director, Through-Silicon Via Program discusses how Applied Materials is leading the next technology inflection to advance Through-Silicon Via (SV) technology for high-volume manufacturing.Read more

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