transistors

May 4, 2011 may go down in history as a day that shook the chip industry to its core, literally. Anyone even remotely interested in technology must have caught Intel’s dramatic announcement on that day that 3-D transistors are now ready to enter high-volume manufacturing.

However, other leading players believe there’s plenty of development room left in two dimensions.

The debate about the relative merits of that third dimension has actually been going on for a while.
(I wrote about this very topic here almost a year ago.) Intel’s announcement, combined with the fact that the semiconductor industry is getting uncomfortably close to the physical limits of conventional transistor construction, is lending new urgency to the subject.

Applied Materials doesn’t make microchips. Our customers – the chipmakers – make them. But they use our machines and technologies to do so, and that gives us a unique perspective.

Two of Applied Materials’ leading technologists, Klaus Schuegraf, CTO of the semiconductor division and senior strategist Khaled Ahmed have written a fascinating article for IEEE Spectrum, exploring these competing technologies and the industry heavyweights lining up behind each one.

As Klaus and Khaled put it:

“Although it’s not yet clear which device architecture will win, what’s certain is that the CMOS transistor – the centerpiece of computer processors since the 1980s – will get an entirely new look.”

I highly recommend you click on over to IEEE Spectrum and read the whole article.

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Recently, I posted a video featuring Applied’s David Thompson explaining how Atomic Layer Deposition (ALD) works, and how it can be used to lay down critical transistor film layers just a few atoms thick.

However, ALD is just one of several techniques that chipmakers will use to overcome the challenges of engineering the nanoscale transistors at the heart of cutting edge semiconductor devices.

In the video above, Steven Hung, Ph.D. who specializes in integrating ALD into the transistor manufacturing process, dives deep into the chip to show what tomorrow’s transistors look like, how they work, and how Applied can help the industry meet the challenges of fabricating these ultra-tiny structures to make faster, more power-efficient microchips.

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Everyone knows that the transistors in a modern microprocessor are on the small side. So small, in fact, that it’s hard to get a grasp on the concept. Some of the critical film layers in the transistor are only a few atoms thick and well over a million transistors would fit inside the period at the end of this sentence.

So how do we actually make these infinitesimal structures? One technique that is becoming increasingly common is atomic layer deposition, or ALD. The ALD process builds up material directly on the surface of the chip, a fraction of a monolayer at a time, to produce the thinnest, most uniform films possible.

In the video above, David Thompson, Ph.D., who heads up ALD chemistry research at Applied Materials, explains how ALD works and explores the specific challenges of applying ALD to high-volume chipmaking.

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Imagine two micrographs side-by-side, one of a transistor from an Intel 286 microprocessor from 1982 and one of a transistor from the brains of the latest smartphone. While they appear quite similar, the new one is 100 times smaller.

Panelists Witek Maszara, GlobalFoundries; Ghavam Shahidi, IBM; Thomas Skotnicki, STMicroelectronics and DK Sohn, Samsung (from left to right).

But conventional transistor scaling is reaching its limits. Beyond the 22nm technology node – sometime in the middle of this decade – traditional two-dimensional, or planar, transistors may be a thing of the past. To continue the incredible advances in speed, battery life and cost, the technology must change. Two new approaches are being considered: three-dimensional transistors and enhancements to planar transistors.

I recently attended a forum that Applied Materials hosted in San Francisco where a panel of experts debated the relative merits of these approaches. Speaking to an audience of over 200 technologists, the panel included experts from leading chip companies: GlobalFoundries, IBM, Qualcomm, Samsung and STMicroelectronics and was moderated by Professor Yuan Taur from U.C. San Diego.

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For the past several years, the industry has been transitioning to high k metal gate (HKMG) transistors in high-performance logic chips. It’s been a tough engineering challenge requiring extensive research into new materials and production processes. But today, HKMG transistors are successfully being produced in high volume manufacturing for advanced logic devices.Read more